1. Field of the Invention
The present invention relates generally to cascaded semiconductor devices, and particularly to semiconductor devices and input devices employing the same characterized in that adjacent integrated circuits (ICs) employ an internal clock obtained by processing a clock employed as a signal timing an external parallel input to enhance resistance to electrostatic noise and the like.
2. Description of the Background Art
A scanner reading a variety of types of image data, for example as shown in FIG. 9, has a glass plate 94 securing an original thereon, and moves an image sensor unit 91 illuminating the original with light while reading an image. A flat bed scanner 9 includes an image sensor unit 91 reading an image, a controller 92 receiving a signal from image sensor unit 91 and processing and outputting the signal for example to a computer, a flexible cable 93 connecting controller 92 and image sensor unit 91 together, a glass plate 94 disposed at an upper surface of image sensor unit 91, and a casing 95, and is constantly required to provide an input image with high precision, read an image faster, and the like.
FIG. 10 shows a circuit configuration of a conventional input device.
Input device 91, as shown in FIG. 10, has a plurality of semiconductor devices IC1, IC2, . . . ICn (hereinafter also simply referred to as “IC”) with adjacent external control signal output and input terminals SDO and SDI, respectively, mutually, electrically cascaded and arranged in a longitudinal direction. Furthermore, the semiconductor device has, as seen in IC1, a plurality of external input units I11, I12, . . . I1m connected thereto, wherein m is an integer larger than 1. Each semiconductor device receives an external clock signal CLK0.
The image sensor unit has shift register-incorporated, functionally identical ICs cascaded and in response to a clock signal CLK0 or a logically inverted version thereof outputs a shifted pulse from each shift register SE successively to a photoelectric converter's switches S11-Sn3 to read data for successive output on a line Vo to prevent data collision, for example as indicated in Japanese Patent Laying-Open No. 2001-045377.
For example FIG. 11 represents a signal between IC1 and IC2, as conventional, when there is no noise. When such signal is input to the FIG. 10 circuit, the circuit operates as described hereinafter. A start signal SP is input to a terminal SD and a prescribed period of time thereafter elapses when the signal falls an external output signal SDO1 transitions high and is transmitted for semiconductor device IC2 as an external input signal SDI2 to a subsequent stage or semiconductor device IC2. Semiconductor device IC2 recognizes the high-level when the device's clock, or a clock signal CLK2, pulses for an ith time, and the data will be transferred to the subsequent IC correctly. Furthermore, a subsequent IC3 similarly transfers data.
When a scanner reading an image or a vicinity of a scanner doing so is touched by a person the human body can discharge static electricity. The pulsed electrostatic noise causes an error in taking in data and the taken image may have a lateral line therein and hence poor quality.
An operation provided when a clock receives noise (as indicated in FIG. 12 by a circle) will be described.
Start signal SP is input to terminal SD and thereafter before the prescribed period of time elapses the semiconductor device IC1 external clock signal CLK0 receives noise for the sake of illustration. Thereafter before the prescribed period of time ends, or when external clock signal CLK0 pulses for an (i−2)th time, external output signal SDO1 transitions from low to high and when external clock signal CLK0 pulses for an (i−1)th time external output signal SDO1 transitions from high to low and is transmitted for semiconductor device IC2 as external input signal SDI2 to the subsequent semiconductor device IC2. Semiconductor device IC2 attempts to take in the signal when an external clock signal similar to that for semiconductor device IC1, or external clock signal CLK0, pulses for the ith time. However, external input signal SDI2 has transitioned low, and data will not be transferred to the subsequent IC correctly. As such, if as shown in FIG. 12 static electricity is discharged or the like and accordingly a pulsed noise is input to the clock and data is taken in erroneously, the obtained image may have a lateral line therein resulting in poor image quality.
In particular, for a flat bed scanner, as shown in FIG. 9, the flexible cable transmitting and receiving data serves as an antenna picking up electrostatic noise. As a result, noise is readily introduced.
In general, electrostatic noise is prevented by mixing an electrically conductive substance into a glass plate that bears an image thereon to be read, applying a metal shield on a glass plate, or the like. Reading an image, however, essentially entails that external signal receiving means has a colorless and transparent top portion or that there is a colorless and transparent portion thereabove. As such, it has been difficult to employ means preventing electrostatic noise.
Furthermore an analog filter may be inserted from an input terminal of an IC employed for the image sensor unit and may be disposed between internal logic units to provide increased resistance to noise. However, a clock signal line, in contrast to other signal lines, is synchronized with a main body. Accordingly it is not preferable to insert an analog filter, as done for other signals.